Integral INSSD64GP25MXZ Ficha Técnica descarregar pdf (Página 6)

6

IORDY(I/O channel

ready)

This signal is used to

temporarily stop the host

register access (read or write)

when the device is not ready

to respond to a data transfer

request.

DDMARDY(UDMA

ready)

The device will assert this

signal to indicate that the

device is ready to receive

UDMA data-out burst.

25

DSTROBE(UDMA data

strobe)

O

When UDMA mode DMA Read

is active, this signal is the

data-in strobe generated by

the device.

28

CSEL(Cable select)

I

This pin is used to configure

this device as Device 0 or

Device 1.

29

-DMACK(DMA

acknowledge)

I

This signal is used by the host

in respond to DMARQ to

initiate DMA transfer.

31

INTRQ(Interrupt)

O

When this device is selected,

this signal is the active high

Interrupt Request to the host

Pin No.

Signal

I/O

Description

32

IOIS16

O

During PIO transfer mode0,1or 2,

this pin indicates to the host the

16-bit data port has been

addressed and the device is

prepared to send or receive a

16-bit data word.

When transferring in DMA mode,

the host must use a 16-bit DMA

channel and this signal will not be

asserted.

35, 33, 36

DA0~DA2(Device

Address)

I

This is 3-bit binary coded Address

Bus.

34

-PDIAG(Passed

diagnostics)

I/O

This signal will be asserted by

Device 1 to indicate to Device 0

that Device 1 has completed

diagnostics,

1 2 3 4 5 6 7 8 9 10 11 ... 24 25

Comentários a estes Manuais

Sem comentários