Integral INSSD64GP25MXZ Ficha Técnica Página 10

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10
PIO timing parameters
Mode
0 ns
Mode
1 ns
Mode
2 ns
Mode
3 ns
Mode
4 ns
Not
e
t
0
Cycle time
(min)
600
383
240
180
120
1,4
t
1
Address valid to
DIOR-/DIOW- setup
(min)
70
50
30
30
25
t
2
DIOR-/DIOW-
(min)
165
125
100
80
70
1
t
2i
DIOR-/DIOW- recovery
time (min)
--
--
--
70
25
1
t
3
DIOW- data setup
(min)
60
45
30
30
20
t
4
DIOW- data hold
(min)
30
20
15
10
10
t
5
DIOR- data setup
(min)
50
35
20
20
20
t
6
DIOR- data hold
(min)
5
5
5
5
5
t
6z
DIOR- data tristate
(max)
30
30
30
30
30
2
t
9
DIOR-/DIOW- to address
valid hold (min)
20
15
10
10
10
10
t
RD
Read Data Valid to
IORDY active (if IORDY
initially low after t
A
)
(min)
0
0
0
0
0
t
A
IORDY Setup time
35
35
35
35
35
3
t
B
IORDY Pulse Width
(max)
1250
1250
1250
1250
1250
t
C
IORDY assertion to
release (max)
5
5
5
5
5
Notes-
1. t
0
is minimum total cycle, t
2
is minimum DIOR-/DIOW- assertion time, and t
2i
is
the minimum DIOR-/DIOW- negation time. A host implementation shall lengthen
t
2i
to ensure that t
0
is equal to or greater than the value reported in the devices
IDENTIFY DEVICE data. A device implementation shall support any length host
implementation.
2. This parameter specifies the time from the negation edge of DIOR- to the time
that the data is released by the device.
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